DP FPU (64 bit IEEE) (verilog)

Double Precision FPU - Verilog (needs more testing) - tuned for size not (necessarily) speed

BTW - My verilog is not fantastic, so if you wish to re-engineer - please feel free to do so and re-post here http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif