New Contributor
Regular ContributorHi,
May I know if all the refclk used for the Transceiver is working and in correct clk? The reason is that I suspect that the refclk is not working correctly which cause the configuration to failed.
New ContributorHi,
I checked the global refclk is working correctly(25MHz), otherwise, the mini-system won't work.
In my design, PCIe module is uesed as EP(end point), and working clk is provided by the Host(root complex, in my system it's PC). This clk is assigned to the dedicated pin for PCIe Hard IP, but it's floated(not connected) when downloading. So, does it matter?
Two more clks(both are 156.25MHz) connect to the tranceiver, but not used for PCIe, designed to use for other two high-speed transmition.
One is connected to the same group of tranceivers with PCIe, but not the same bank(PCIe used bank 1K,1L, 156.25MHz used for 1N,1M), the other clk connected to the other group of tranceivers.
