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The Nios II data master is suppose to be connected to AVMM Slave of the jtag uart. Same goes with the timer.
You debug_reset_request in your Nios II should be connected to the reset of jtag uart. And disconnect it from the clk_in_reset and nios_ii_gen2_reset.
Refer to this:
http://www.alterawiki.com/uploads/4/45/hello_world_lab_manual_max10.pdf and connect the debug_reset_request of nios ii to the jtag_uart_reset.
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I get an error message in Qsys
Error: system.clk_0: clk_0.clk_in_reset must be connected to a reset source
If I connect it then I get same error again. Nothing works.
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