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I'm doing some heavy algorithm stuff in a Stratix IV eval kit. I need to download large amounts of test data to external memory (SDRAM, SRAM, etc.) from windows, process the data in the FPGA, retrieve the results and dump it to a text file that I can read with MATLAB. Is anyone familiar with an convenient ways of getting data into/out of FPGAs? There is Ethernet, JTAG (both usb and header based), PCIe edge connector, HSMC connector on board. I don't have any software programming support, so it would have to be something a firmware guy could easily figure out.
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You can download a free demo of the WebPHY DATABUS IP Core from here:
http://www.webphyfpga.com The IP core can send and receive data between a FPGA and MATLAB over Ethernet using its web-based "rd" and "wr" commands, wrapped in MATLAB's "urlread" command. The core also has a user-customizable web page allowing browser-based control of the FPGA. The core connects to Ethernet via standard LVDS-configured IOBs on the FPGA. No external PHY or DDR/Flash memory chips, software TCP stack or embedded CPU are required - everything is contained within the core.
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