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Altera_Forum
Honored Contributor
13 years agoDownloading data directly to FPGA (not FPGA configuration)
I'm doing some heavy algorithm stuff in a Stratix IV eval kit. I need to download large amounts of test data to external memory (SDRAM, SRAM, etc.) from windows, process the data in the FPGA, retrie...
Altera_Forum
Honored Contributor
13 years agoI did a similar thing with a Cyclone IV evaluation kit.
I created a stand-alone project that had a RAM with the test data (from a .mif file) and wrote that data to the SDRAM. After that I wrote a wrapper for my algorithm that read the data from the SDRAM (simulating real-time data input in my case), the algorithm processed the data and then I used SignalTap to read the data from the algorithm output. I used the "export file" option in SignalTap, exported the data to CSV and then checked it in Matlab. Note that you need to keep the evaluation board powered after writing the SDRAM so that it will not be erased. Hope this helps.