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Altera_Forum
Honored Contributor
16 years agoDon't optimize away method issue need your help
Hi all: I am using EPM7512AETC144-12 device. There many trigger signals need to be delayed in my design. For the limitation of the resource, i use gate delay to archive this function. I ...
Altera_Forum
Honored Contributor
16 years agoSeems like you found a way to keep CPLD macro cells. I'll study the results later on.
Regarding registers, you should refer to the MAX7000 macro cell description in the datasheet. There's no dedicated latch available, just a DFF with a bypass path. So, if you don't need a synchronous register, it's simply bypassed. I don't see, how it could work as a delay element.