Forum Discussion
HBhat2
Contributor
6 years agoHi,
As tx_outclock generated from a PLL, it is better to assign to a dedicated clock output pin for better jitter performance and clock specific routing inside the FPGA.
With Regards,
HPB
Hi,
As tx_outclock generated from a PLL, it is better to assign to a dedicated clock output pin for better jitter performance and clock specific routing inside the FPGA.
With Regards,
HPB