Dividing two N-bit signed binary (with fractional bits) in Quartus

If 'd' has too much of a range and doesn't fit reasonably into a lookup table you may want to try serial division. A serial divider works on a single bit of the numerator per clock cycle so the calculation time is determined by the numerator width. So it doesn't have the pipelining performance of say lpm_divide that can handle a calculation after every clock cycle once the pipeline is warmed up but it's fairly small and hits a relatively high Fmax. I don't know if I have my implementation of it around still but it's a pretty easy thing to implement since it's based on the same techniques as you learned long ago in school called long division.