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Altera_Forum's avatar
Altera_Forum
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18 years ago

Difference between VCCIO and VREF?

hi,everyone. i just start to use fpga cycloneIII,and i have a question which may be easy to answer. Thank you. question :is it right that VCCIO just supply the power?for example,if i want...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

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BD SLS

Thank you.

IF interface fpga with 2.5v device,VREF must be connected to 2.5V,and VCCIO could be connected to 3.3V, and in this case,IO ports in this bank is 2.5V standard.

Is it right?

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No.

If you want to interface with a 2.5V device you need to connect VCCIO for those banks to 2.5V.

VREF is used only for voltage referenced SSTL or HSTL I/O modes, in which case you connect VREF to half the rail normally(example: for VCCIO=2.5V, VREF=1.25V).

If you don't use SSTL/HSTL, VREF pins can be used as normal I/Os.