Altera_Forum
Honored Contributor
17 years agoDFF Clock Polarity & Other signal polarities
Hi all,
I'm relatively new to Quartus, but have used Altera and their other tools long ago. Currently, I'm using Quartus II web edition using Block/Schematic entry building a MAX II device. A question that always comes up is: What is the active-edge/polarity of the various parts of the LEs ? Namely, the flip-flop clocks. Also, what's the polarity of the tri-state control on the IOEs ? I guess a broader question would be, where does one find this low-level info on the specifics of the LEs ? A 2nd Question: When specifying, for example, a device-wide output enable in the Device and Pin Options, where/how is the pin assigned? Thanks for your help RW