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Altera_Forum
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17 years ago

DFF Clock Polarity & Other signal polarities

Hi all, I'm relatively new to Quartus, but have used Altera and their other tools long ago. Currently, I'm using Quartus II web edition using Block/Schematic entry building a MAX II device. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

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Hi all,

I'm relatively new to Quartus, but have used Altera and their other tools long ago. Currently, I'm using Quartus II web edition using Block/Schematic entry building a MAX II device.

A question that always comes up is: What is the active-edge/polarity of the various parts of the LEs ? Namely, the flip-flop clocks. Also, what's the polarity of the tri-state control on the IOEs ?

I guess a broader question would be, where does one find this low-level info on the specifics of the LEs ?

A 2nd Question: When specifying, for example, a device-wide output enable in the Device and Pin Options, where/how is the pin assigned?

Thanks for your help

RW

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Hi,

for detailed info's look into:

http://www.altera.com/literature/hb/max2/max2_mii51002.pdf

Kind regards

GPK