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Altera_Forum's avatar
Altera_Forum
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15 years ago

Devide in VHLD

I want to implement this function : A<= B/x"A", when I compile, the Quartus put a notice: "/" used but didn't declare. When I try with "*" (multiply) or "+" (add), it is ok. I don't know this er...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Dear FvM

I want to implement Multiplication command in VHDL. Because Modelsim does not support for LPM library. And when I use multiply command directly, the result's not true with the negative number.

In this method, I multiply two positive number, and use sign<=A(15)xor B(15); to check the sign of A and B.

If sign=0 => the result's positive. else the result's negative.

When I simulate with the waveforms, it appear strange value. I did not understand it.

Do you have other idea for this?