Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Devide in VHLD

I want to implement this function : A<= B/x"A", when I compile, the Quartus put a notice: "/" used but didn't declare. When I try with "*" (multiply) or "+" (add), it is ok. I don't know this er...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

comment out std_logic_arith and std_logic_unsigned packages. Bring back numeric_std package.

Then make remainder and divider signals signed types. You cannot assign a "signed" type to a std_logic_vector.