Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorDevide in VHLD
I want to implement this function : A<= B/x"A", when I compile, the Quartus put a notice: "/" used but didn't declare. When I try with "*" (multiply) or "+" (add), it is ok. I don't know this er...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- The loop is infinite if 'Devider' is 0. No synthesizer will be able to synthesize this. It will also probably give strange results with a negative divider. While you are at it, you should use ieee.numeric_std and the signed and unsigned types rather than ieee.std_logic_signed. numeric_std is standard, makes it easier to mix signed and unsigned arithmetic, and makes the code more readable and maintainable. --- Quote End --- Ok. If the "Devider" is 0, the loop will infinite. Thank you for your advise. I will change to use numeric_std. --- Quote Start --- As tricky said even if you fixed this, it will result in massive parallel hardware, which probably isn't what you want. If you don't need the result in a single clock cycle, you should consider unrolling the operation over several cycles to get a much smaller hardware footprint. --- Quote End --- I want this process must finish before go to next step therefore i use loop. Do you have any idea for this process?
