Altera_Forum
Honored Contributor
17 years agoderive_pll_clocks cmd and it's generated clk
Hi,
I have a question regarding derive_pll_clocks. Quote taken from QII Handbook Vol 3 pg 6-36 Under title Derive PLL Clocks "If you use the write_sdc command after the derive_pll_clock command, the new SDC file contains the individual create_generated_clock commands for the PLL output clock pins and not the derive_pll_clocks command." My objective here is to get the individual create_generated_clock commands for all PLL output clocks. After full compilation is successful, in TQ analyzer, I do the below: 1. Create timing netlist, Read SDC, Update timing netlist 2. Type "write_sdc mysdc.sdc" in the tcl console in TQ analyzer When I open up mysdc.sdc, I did not get individual create_gen_clk commands in the sdc file, instead what I get is only the command "derive_pll_clocks" in the sdc. Is my step incorrect or is the QII handbook not right (the quote above)? Can some kind souls point me to how I can get individual create_gen_clk commands? (the reason I want the individual gen_clk is because I need the exact name of the pll inclk port and the pll outclk port) Thank you.