Demux output behavior

Hi,

I have a question on a demux, says 1:2 demux, and let's call A and B are the output. Then the input is connected to A, then what is the value of B? Is B holding the previous value? or unpredictable?

My simple code for the demux is:

---------------------------------------

library ieee;

use ieee.std_logic_1164.all;

entity sample_demux is

port(

in, clk, sel: in std_logic;

out1, out2: out std_logic

);

end sample_demux;

architecture rtl of sample_demux is

begin

process(clk)

begin

if clk'event and clk='1' then

case sel is

when '0' =>

out1 <= in;

when '1' =>

out2 <= in;

end case;

end if;

end process;

end rtl;

----------------------------

Actually, I want to keep the previous value even when the output is not connected to the input.

Thanks!