Delay chain design?

If you review the Altera Froum threads related to TDC designs, you'll find reports about implementations utilizing the carry chain, which is in fact the fastest available resource for asynchronous delays. There's also a previous discussion about using Gigabit transceivers for timing measurements.

Constraining LE locations won't be sufficient, you would also need to take command over the route selections, which isn't provided by the tool as far as I see. It would also require to understand exactly the available connections for individual LUT inputs, which is more complex than in may appear at first sight, at least for Cyclone III devices. The inputs have different delays and connection capabilities as the resource property editor reveals - and are freely changed during design routing.

A basically simple method for picosecond range timing measurements is using analog time-to-voltage conversion (and succeding digitizing).