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Honored Contributor
Honored ContributorDelay chain design?
Hi I am using the cycloneIII 3c120 kit to learn designing with FPGA. What I would like to do is a delay chain, in which a signal is delayed by each chain element on the order of 100..500ps...
Altera_ForumHonored Contributor
Honored ContributorThe signals that I process are not at GHz, but the times measured should be below 1 ns. The signals are quite slow (1 pulse per second)
I think, that the FPGA could be used to make a delay, as I could do this using hardware inverters. Why does this not work?
