I'm not sure you're giving us enough specific detail to work with. It simply sounds like both your design and the additional debug counter logic you've added fail to do anything.
So, for the minute I suggest you consider the following:
You suggest your design simulates correctly in ModelSim. First confirm that you're stimulating your simulation in exactly the same way as your real hardware is. Unless you do this you will not uncover potential conditions that cause your design to lock up - it could easily be something you've unintentionally designed into your logic.
You must also confirm your design meets timing. A design that doesn't meet timing is unlikely to behave as you expect. Re-check your timing constraints (I trust you've added some) and confirm the design meets them.