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Altera_Forum's avatar
Altera_Forum
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8 years ago

DE2-70 SRAM timing question

Hi First off, I'm fairly new to FPGA programming, so I apologise in advance for any obvious questions, and thank you for your patience. So I'm currently trying to design a processor that make...
Altera_Forum's avatar
Altera_Forum
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8 years ago

Quartus has an "in-system memory content editor (http://quartushelp.altera.com/16.1/index.htm#program/red/red_com_editor.htm)" built in - see the Tools menu in Quartus. However, it'll only let you monitor/change memory internal to the FPGA, via JTAG.

It is worth playing around with. You should be able to setup an internal RAM to mirror a portion of external SSRAM. It requires more code and, rather fundamentally, a working interface to your external memory. However, it can be a useful debugging tool.

Cheers,

Alex