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Honored Contributor
Honored ContributorDE1-SoC problem with tree please HELP!!
I’m trying to configure a qsys system with hps and vga control to see the Linux environment and create a c program that can obtain the memory mapped signal and print on the vga. The steps that I d...
Altera_ForumHonored Contributor
Honored ContributorHi, I'm worried about this. Do I have to recompile linux? Is this mandatory?
--- Quote Start --- Hello, for the VIP IP in the FPGA, you will need to add to the device tree manually (as far as I know, the device tree generator does not recognize the VIP IP). To obtain the VIP device tree declaration, you can use the device tree file that is included in the DE1-SoC MTL2 package. http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=204&no=930&partno=4 I've attached the relevant dtsi file here - you can modify or merge with your own dts file --- Quote End ---
