[DE1-SOC] How to handle interrupt of msgDMA in a linux application

I'm using DE1-SOC and I have a system which streaming data from a fifo in FPGA to SDRAM by msgDMA.

I have controlled msgDMA to write the descriptor and read data from SDRAM successfully but I don't know how to register and handle the interrupt of event completing a transfer in linux application.

In my qsys design, the csr_iq of msgDMA is connected with f2h_irq0 of HPS, is it correct?

Is there a way to interrupt the program without writing a kernel module? I have no knowledge about writing a kernel driver.

Currently, I'm trying a stupid way as below:

  write_descriptor_to_base_address();
  csr_ret = read_csr_status();
  while(1) {
    if ( (csr_ret >> 8) & 0x1) == 1) {   // read the bit 9th where IRQ_ID was set 
            handle_event_transfer_complete();
            break;
     }
  }

Could anyone here give me some advice to solve the problem?

Thank you,