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Altera_Forum's avatar
Altera_Forum
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11 years ago

DE1 SoC and UART

Hi guys,

let me present you the problem I encountered. As pointed out in the title, I am working on a DE1 SoC board and am a beginner as far as working on FPGAs is concerned. What I am trying to do is to transmit data from my PC to the board. I am not using the JTAG UART, I have another link that goes from one USB port of my PC to the mini USB port of the board where the USB to UART is located. I wrote a program in C on my PC to send one character to the board and i know that it works because each time I request the program to send a character, the blue RxD LED of the board blinks.

Now, on Quartus I built up a Qsys system according to ftp://ftp.altera.com/up/pub/altera_material/13.1/tutorials/introduction_to_the_altera_qsys_tool.pdf . I did use a UART component instead of JTAG UART.

I can, without any problem download the system in the board.

Then, on Eclipse I made a project according to the directions in the same tutorial. And I wrote a C program to retrieve the character that is sent from the PC to the board. 

#include <stdio.h># include <stdlib.h># include "system.h"# include <unistd.h># define switches (char *) 0x21020# define leds (char *) 0x21030
void main(void)
{
    char c = 0x00;
    FILE * fp = fopen("/dev/uart_0","r+");
    while(1)
    {
        if (fp != NULL)
        {
            c = getc(fp);
        }
        *leds = *switches;
    }
}

However, impossible to retrieve the character, the program is blocked on getc(). But 


        *leds = *switches;

works fine when I do not call getc() (each switch turns a LED on on the board).

I know that uart_0 is the name of the UART instance of the system (I checked in "system.h"). I also ensured that the "lightweight device driver" option is disabled (I found out on the internet that it could affect the UART).

Could you guys propose me a solution or give me any hints ? I have been puzzling over this for hours and it is really frustrating not to be able to progress.

Cheers !

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    I don't know the DE1-SOC, but other SOC demo boards connect the USB UART to the UART built into the SOC. Therefore you don't need a UART component (JTAG or otherwise) in QSYS like you do with a non-SOC board. Check the demos that come on the system disk for the DE1-SOC. There are probably some that use the UART. Write your code to use the UART in the same way that the demos use it. It probably sets up the UART to be the standard C console I/O. You probably don't need fopen.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    I suspect the same thing. The pdf file you linked to had you building a Nios II system in Qsys which utilized the UART component (synthesized using FPGA logic). But the dev kit you have probably connects the UART interface to the UART controller built into the HPS. One thing you probably could do those is turn those UART pins into loan I/O so that FPGA logic can connect to them. Then you would design the system just like you do in the pdf except you would have to connect the UART in Qsys up to the HPS block using the loan I/O (so you are instantiating the HPS in order to steal some pins to use for the UART).

    So is the purpose of what you are doing to just try out Qsys building a Nios II system and you just happened to have a DE1-SoC board, or is your intent to use the board for what it's design for (using the HPS in the SoC device)? If it's the latter then I would just run software on the Cortex-A9 and use the UART that comes with the HPS block. I'm sure the DE1-SoC already comes with something packaged together that already uses the UART this way.