DE1 SoC and UART

I suspect the same thing. The pdf file you linked to had you building a Nios II system in Qsys which utilized the UART component (synthesized using FPGA logic). But the dev kit you have probably connects the UART interface to the UART controller built into the HPS. One thing you probably could do those is turn those UART pins into loan I/O so that FPGA logic can connect to them. Then you would design the system just like you do in the pdf except you would have to connect the UART in Qsys up to the HPS block using the loan I/O (so you are instantiating the HPS in order to steal some pins to use for the UART).

So is the purpose of what you are doing to just try out Qsys building a Nios II system and you just happened to have a DE1-SoC board, or is your intent to use the board for what it's design for (using the HPS in the SoC device)? If it's the latter then I would just run software on the Cortex-A9 and use the UART that comes with the HPS block. I'm sure the DE1-SoC already comes with something packaged together that already uses the UART this way.