DE0-nano: JTAG breaks when loading from EPCS

Hello,

I am using a DE0-nano Board now for serval weeks successfully. The FPGA is configured via the on-board EPCS Flash. Therefore the MSEL-Switches are turned to MSEL = ‘10010’. The code for the HPS stored and loaded from an external SD-card.

However since my last programming, the JTAG-chain is broken. Windows does not recognize the DE0-nano board in the device manager.

When I change the FPGA-config-settings to another source [eg.: MSEL = ‘01010’], the Board is recognized by Windows again. So the JTAG-chain is working. I can program the FPGA via the JTAG-chain directly.

When MSEL is switched to ‘10010’ the FPGA in configured successfully. So both the HPS and the FPGA are doing their jobs. However I cannot access the JTAG-chain for debugging anymore.

Is there any setting in Qsys or Quartus II (16.1.2) which denies the JTAG-access when the FPGA is configured by the EPCS?

Best regards

Benjamin