I am not trying to imply anything here rather looking for a solution.
So basically i generate my hdl code matlab hdl coder. DE0 NANO board is not directly recognized by MATLAB HDL coder, so you have to create a custom board where you specify the name of the board, clock pin (FPGA pin number as input clock), input clock frequency and in the interfaces you want to use for input and output from FPGA. So with the on board 50 MHz oscillator which is connected to pin R8 in the DE0 NANO board it was working fine. I could download the program to the board. So when i took out the oscillator and connected the external clock to the same FPGA pin, in the MATLAB HDL coder board definition instead of 50 MHz i just specified 22.5 MHz. And all the other settings including my simulink design file is same.
And the error is explicitly referring to the clock module file, not to any of the vhdl files where my designs are so that's why i guessed that the external clock setting is wrong some how. And if you had a look at the attached vhd file, could you please tell me what does line 62 mean?