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David_S1's avatar
David_S1
Icon for New Contributor rankNew Contributor
3 years ago

DDR4 calibration in Stratix 10 1SG040HH3F35E2LG device

Hello, We are using 1SG040HH3F35E2LG device in a custom board. We have generated an example design for DDR4(AS4C512M16D4) using traffic generator in Quartus Prime version 22.2. We have modified the...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi David,


Can you check the design for any timing violation especially in Report DDR section?


Can you provided some snapshots of the EMIF Parameter Editor setting for checking the EMIF IP configuration?


Regards,

Adzim