Forum Discussion
Alican
New Contributor
4 years agoDDR3 UniPHY Example Design simulation problem
I am trying to simulate my testbench based on DDR3 Example Design controller model.
Briefly; I use the DDR3 memory as dual port, under "Controller Settings" tab Number of ports:2. One of them is wr...
AdzimZM_Altera
Regular Contributor
4 years agoHi Alican,
Thank you for your reply.
I've tried to search for the known issue in the KDB website but I don't found the exact issue like your.
I've found a KDB that might be related to your issue.
Maybe you can try the workaround in the KDB. Link below.
https://www.intel.com/content/www/us/en/support/programmable/articles/000080439.html
Please let me know any update later.
I need to consult with the internal team for better understanding because I'm not familiar with this configuration.
I will let you know later.
Regards,
Adzim