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Altera_Forum
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12 years ago

DDR3 Uniphy altera example design error in Modelsim

Hi, I'm trying to simulate the DDR3 Uniphy Memory controller example design in Modelsim, but I keep getting errors. I did everything Altera said in its readme.txt file. Nothing helps... In Mod...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Can I assume you copied and pasted the error message into the post? I can't help but notice the "space" in the path of the source file. "c:_/cccc/...". Is it that the tools can't find the source file?

Cheers,

Alex