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Honored Contributor
Honored ContributorDDR3 Testing
We are now about to test a new design with a DDR3. We are planning to first connect the DDR3 to our NIOS and do a full memory test of different addresses with differing values, most probably utilizin...
Altera_ForumHonored Contributor
Honored ContributorHi,
You can make use of Altera EMIF example design for the testing: https://www.altera.com/documentation/hco1416493470528.html#hco1416493106997 The example design have a traffic generator component that will train the DDR3 read write and issue pass/fail flag after the rd/wr test. (This message was posted on behalf of Intel Corporation)
