DDR3 setup

Hi KKomp,

There are 3 factor that I can think of that may cause DDR3 calibration failure - DDR3 IP setting issue, board design issue or preloader software build issue

My debug suggestion is as below.

1. To isolate DDR3 IP setting and board design issue

• Generate DDR3 RTL example design using FPGA core DDR3 IP instead of HPS DDR3 IP
  • Fix the pin location to match your existing SOC DDR3 pinout location
  • If test fail then you need to debug further on either DDR3 IP setting or your board design
  • If test pass then you can move on to debug preloader software build issue

1. Debug preloader software build issue

• Checkout below golden reference design guideline to ensure you compile and build the preloader software correctly as per the guideline
  • https://rocketboards.org/foswiki/Documentation/AVCVGSRD161

Thanks.

Regards,

dlim