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Altera_Forum
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13 years ago

DDR3 Layout Length Matching

Hello, I am laying out a DDR3 memory based on 4x 16bit chips and have seen in EMI Handbook Vol 2, Chap 4, Table 4-23 that "data, address and command signals must have matched length traces to w...
Altera_Forum's avatar
Altera_Forum
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12 years ago

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Hi Ken,

I make difference beteween specification and and example,it's good.

I want make layout with iMX53 and 4 DDR3, like chapter 2.5.11 Gbyte Topologies. Now, I think I understood matching but, I see that addressis more long (about +150mil) than clock in layout of evaluation board IMX53-start-R(it's also 1Gbyte topologies).

There's a reason?

Laurent

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Hi Laurent,

I don't have the layout you're referring to, so perhaps it would be better to ask in an iMX53 forum. If it's a working layout then you could always copy it.

Good luck with your design!