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Altera_Forum
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13 years ago

DDR3 Layout Length Matching

Hello, I am laying out a DDR3 memory based on 4x 16bit chips and have seen in EMI Handbook Vol 2, Chap 4, Table 4-23 that "data, address and command signals must have matched length traces to w...
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Altera_Forum
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12 years ago

Hi Laurent,

I think you have a misunderstanding of table 2.4. It is not a specification, only an example of their design, and they don't show the address/command lines. 90% is what I saw in their example (1175 / 614 = 1.9). It's not a spec!

For the spec you should follow table 2.2, which as you say, shows the address & command as between clock-200 and clock.