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Altera_Forum's avatar
Altera_Forum
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12 years ago

DDR3 HMC settings

Hi, all I am now working to use two 16bits DDR3 to get a 32bits data width DDR3, my question is how will i to do with the settings of "Number of chip selects" and "Mirror Addressing:1 per chip ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Thank you very much! I have download the development kits of Cyclone V.

Now I have another question and sorry to disturb you.

when i do clock design of Cyclone V 5CEFA9F31, should i use one clock to drive the all FPGA with two DDR3 HMCs or drive each bank by distributed clock coming through dedicated pins of each bank?

which way is better?

Best Regards!