DDR2 with DE3 Terasic Boad

Hello All,

I am quite a beginner here and I am facing some problems in my Project. I am using the DE3 Terasic Board. In principle, I have many VHDL blocks that do some calculations and I need to store and modify a big amount of data (around 200-300 MB ), so I am thinking of using the DDR2 RAM for that. I have two questions in here, first one is: can I access the DDR2

RAM with a VHDL module only (in order to have a fast operation)? Basically

I need to know how I could read or write data to specific addresses in the memory. To have a black-box module with just the address, data, read and write signals. Could anyone provide such code example or module creation walk through tutorial?

Since I am short in time, I decided to use a NIOS II/f processor in order to do this memory read and write operations then the NIOS processor would communicate with the other VHDL modules. I looked up the provided example code on the CD with the board package and I have a problem with it. There is the batch example which directly programs the FPGA and runs the NIOS shell, and it works perfectly fine, as per the screen shots in the manual. However, when I program the FPGA from the Quartus II progammer, use the same C code from the files on the CD to create a new NIOS project, I do not get the same output. I get this instead:

nios2-terminal: connected to hardware target using JTAG UART on cable

nios2-terminal: "USB-Blaster [USB-0]", device 1, instance 0

nios2-terminal: (Use the IDE stop button or Ctrl-C to terminate)

===== DE3 DDR2 Test Program =====

DDR2 Clock: 266.6 MHZ

DDR2 Size: 1024 MBytes

DDR2 Rank: 1 Rank(s)

DDR2 Bank: 3 Bank(s)

DDR2 Row: 14

DDR2 Col: 10

==========================================================

Press any BUTTON to start test [BUTTON0 for continued test]

=====> DDR2 Testing, Iteration: 1

write...

===== DE3 DDR2 Test Program =====

DDR2 Clock: 266.6 MHZ

DDR2 Size: 1024 MBytes

DDR2 Rank: 1 Rank(s)

DDR2 Bank: 3 Bank(s)

DDR2 Row: 14

DDR2 Col: 10

==========================================================

Press any BUTTON to start test [BUTTON0 for continued test]

It stops at the "write..." step and 'seems' to go through a reset. Did anyone tackle this issue before? Is this a problem with the DDR2 RAM configuration

or is it just a problem of interface with the NIOS and the Console?

Thanks!