Forum Discussion
Altera_Forum
Honored Contributor
14 years agoDDR2 pin assignment
This is a very long shot, probably nobody will answer this, but here I go just in case. In Quartus II 11.1, for an EP4CGX50CF23C7 (F484 package, speed grade 7), I instantiated an altmemphy int...
Altera_Forum
Honored Contributor
14 years agoYes, the handbook has instructions on using the Pin Planner for finding this out. Better would be for the pinout documents to label the DQ and DM pins in a way that relates them with their respective DQS pin, instead of just being generic (they only specify bank). Perhaps there is a reason for this, but it is definitely misleading.
I've submitted a SR for this.