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Altera_Forum
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14 years ago

DDR2 pin assignment

This is a very long shot, probably nobody will answer this, but here I go just in case. In Quartus II 11.1, for an EP4CGX50CF23C7 (F484 package, speed grade 7), I instantiated an altmemphy int...
Altera_Forum's avatar
Altera_Forum
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14 years ago

Thanks for the answer akira. Unfortunately the schematic is done... even the layout... even the board ! (well, just a prototype)

Not sure what you mean by 'it should be assigned with the same group of dq-pins and dqs pins', but just to clarify, all dq and dqs are in the same bank (3), and they are all in pins marked as DQ, DQS, and DM respectively in the pin list for this device.