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Altera_Forum
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16 years ago

ddr2_auto_verify_timing

Hi all, I am using Altera' DDR2 IP core with feedback clock option and I am encountering one problem: The auto_verify_ddr_timing.tcl script could not be done. error: d...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Have you regenerated the Megacore using the same version of Quartus that you are compiling with?

Going back a step, is there a good reason to use fedback clock mode? It is a lot of trouble, and doesn't give a massive performance improvement.