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GLees's avatar
GLees
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3 years ago

DDIO Input Speed Cyclone V vs. Cyclone 10GX

When I create a simple DDIO input for both the Cyclone V and Cyclone 10GX parts, the Cyclone V has an Fmax about twice the Cyclone 10GX. Cyclone V, Fmax ~ 400Mhz Cyclone 10GX, Fmax < 200...
lixy's avatar
lixy
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3 years ago

Hi,


Since I still couldn't open the project you provided, I created a project with cyclone 10gx device to match your netlist.

I wonder if the IP you used in C10 GX project is "GPIO Intel FPGA IP"?

I used this IP in cyclone 10gx project and found that it is true that the Fmax is under 200MHz.

When Fmax Restricted = Fmax, it generally means that the speed is limited to the design instead of device.

In this case, it might be related to the IP itself.


Thanks & Regards,

XY


  • GLees's avatar
    GLees
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    3 years ago

    Thank you for taking the time to re-create the project and to verify my result, that Fmax < 200Mhz. I used the "GPIO Intel FPGA IP" as you guessed. What I don't understand is why the cyclone 10gx is so much slower than the cyclone 10 lp, or even the cyclone v. I'm trying to design a 64 bit, DDR, source-synchronous deserializer with an input clock rate of at least 350Mhz. The DDR input speed is key to my design and I can't seem to achieve it with what is supposed to be a high perfomance FPGA.