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Altera_Forum's avatar
Altera_Forum
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11 years ago

data acquisition

Hi,

I have been trying to develop a control system with DE2-115. I have to plot the values of the state variables and the output of the system, the reference signal, the control signal for each 1ms sample period. I have tried to capture data with in system sources and probes but it could not obtain data in 1ms periods.

Could you please give me some advice ?

Thank you.

Bedri

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Is there anyone can help me about data logging for the periods of 1ms?

    Regards,

    Bedri
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    There may be different approaching, aiming different outcomes.

    Start with SignalTap, so that you can visually see the outcome of your system.

    Then if you need to design a Data Acquisition system, you should instantiate some memory blobks & controllers to save data. There may be numerous ways ranging from software-based using Nios, PC to hardware-based embedded methods.
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Thank you for your reply.

    I have been trying to log data with using in system source and probe, and signal tap II tools. The sample period of my control system is 1ms and the major problem is that i couldn't log data at each period. For example I wrote a tcl code for in system source and probe, which reads continuously probes, but it can read data in period of approximately 5ms. In this case some data are lost.

    I have been trying to find the information about limitation on speed of jtag.

    Now do you have any advice?

    Regards

    Bedri
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    I cannot understand your problem. You can simply write a VHDL/Verilog code to trigger appropriate signals. Use SignalTap and set trigger option on that specific signal. You can easily see outcomes of your design using SignalTap with speeds much higher than 1 ms, normally in the range of several nano seconds.

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    thank you for your reply.

    Sorry for my bad english to explain my problem. But i understood what you said and i'm going to write vhdl which includes signaltap.
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    thank you for your advice. now i can capture data from de2-115. but there is a new problem. i can define the sample dept to at least 16K. between two 16K there are some lost data. for example my captured sample time counter starts from 0 and ends at 14337 in first 16K. in the secont 16K sample time counter starts from 15418. this means that aproximately 1000 data are lost.

    what can i do to overcome this problem?

    regards