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Altera_Forum
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16 years ago

CycloneIII internal logic driving PLL

Hi, I have 2 LVDS inputs: Data/Strobe. To recover the clock I XOR the Data/Strobe signals from the LVDS receivers. I need to drive a PLL with this clock, but the Cyclone III Handbook Section 5 Tab...
Altera_Forum's avatar
Altera_Forum
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16 years ago

There's no automatic alignment for LVDS receivers (DPA). But dynamic phase shift is a PLL option since Cyclone III, you can utilize it in user logic..