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Honored Contributor
Honored ContributorCycloneIII internal logic driving PLL
Hi, I have 2 LVDS inputs: Data/Strobe. To recover the clock I XOR the Data/Strobe signals from the LVDS receivers. I need to drive a PLL with this clock, but the Cyclone III Handbook Section 5 Tab...
Altera_ForumHonored Contributor
Honored ContributorCan you direct me to an app note of using dynamic phase shift. All of the documentation talks about it, but doesn't give enough detailed info on the inputs to the PLL to implement it.
