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Honored Contributor
Honored ContributorCycloneIII internal logic driving PLL
Hi, I have 2 LVDS inputs: Data/Strobe. To recover the clock I XOR the Data/Strobe signals from the LVDS receivers. I need to drive a PLL with this clock, but the Cyclone III Handbook Section 5 Tab...
Altera_ForumHonored Contributor
Honored ContributorA better solution is probably synchronizing a PLL to the input signal utilizing the dynamic phase shift feature.
