Forum Discussion
Honored ContributorCyclone V speed is much slower
Hello. I am new to Cyclone V. I took my design for Cyclone III and recompiled it with Quartus II web 13.1. From the timing analyzer, I can see that the maximum clock rate is only 84 Mhz while I was getting 131 Mhz with cyclone III at the same C8N speed grade. The timing recommendation is incomprehensible. Would anyone who knows cyclone V well tell me if this is expected? Is Cyclone V significantly slower than Cyclone III? This doesn't make sense.
Thanks a lot. Jixiang34 Replies
Altera_ForumHi Pete;
I've been playing with the PLL settings in qsys this morning, but so far can't find any setting that reduces the reported clock delay. Changing to source synchronous mode actually increased the reported clock delay to 5.7ns. From the PLL documents it sounds like normal mode should do the trick, but no luck there. I haven't tried zero delay buffer yet since I don't have a clock output to connect to.- Altera_Forum
Quartus synthesis might be able to achieve a higher maximum clock speed if the design is constrained for it. Did you try?
- Altera_Forum
Yes, I think I've got the constraints right. The problem is that Quartus can't make the timing constraints on the Cyclone 5 while the identical project using a Cyclone 4 meets timing with no problems.
I've got a service request in with Altera now, so I'll post back if I can get to the bottom of this. Thanks, Steve - Altera_Forum
So I heard back from Altera support on this. It looks like the long clock delays are a fact of life on the Cyclone-V. To quote Altera support:
"Since the clock network structure of Cyclone V is different than the old device, we will expect a longer delay in the clock path." I'm experimenting now with manually phase shifting the PLL to try to improve my timing, but it's a bit disappointing to find that the Cyclone-5 has so much more delay on it's clock network then the Cyclone-3 or 4 devices.
