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Honored Contributor
Honored ContributorCyclone V speed is much slower
Hello. I am new to Cyclone V. I took my design for Cyclone III and recompiled it with Quartus II web 13.1. From the timing analyzer, I can see that the maximum clock rate is only 84 Mhz while I was...
Altera_ForumHonored Contributor
Honored ContributorHi Pete;
I've been playing with the PLL settings in qsys this morning, but so far can't find any setting that reduces the reported clock delay. Changing to source synchronous mode actually increased the reported clock delay to 5.7ns. From the PLL documents it sounds like normal mode should do the trick, but no luck there. I haven't tried zero delay buffer yet since I don't have a clock output to connect to.
