Cyclone V SoC HPS2FPGA AXI Master - How to enable?

Hi

I Would appreciate it if someone can guide me how to read and write to a on chip memory connected to the H2F Bridge (Full) BAREMETAL. I do the following

while (1==1)

{

alt_write_word ((0xc0000000 + TEST_ONCHIP_MEMORY_BASE+loop), ~loop);

ReadValue = alt_read_word (0xC0000000 + TEST_ONCHIP_MEMORY_BASE+loop);

ReadValue = alt_read_word (0xC0000000 + TESTFIFO_RD_BASE+loop);

ReadValue = alt_read_word (0xC0000000 + TESTFIFO_STATUS_BASE+loop);

loop++;

}

The On chip memory, TESTFIFO RD and TESTFIFO Status is all conencted to h2F bridge.

I can read successful from on chip memory with offset 0. But when reading from TESTFIFO_RD and TESTFIFO_STATS i read 0xffffffff, the inverted of loop (0x0). So i read the same value for all 3 ports.

Also when the while loop re-execute the second time e.g. loop = 1, the software crash when writing to the on chip memory.

To initialize the H2F Bridge i use the Altera library in alt_address_space.h & alt_bridge_manager.h as follows

status = alt_addr_space_remap(ALT_ADDR_SPACE_MPU_ZERO_AT_BOOTROM,

ALT_ADDR_SPACE_NONMPU_ZERO_AT_OCRAM,

ALT_ADDR_SPACE_H2F_ACCESSIBLE,

ALT_ADDR_SPACE_LWH2F_ACCESSIBLE);

}

if (status == ALT_E_SUCCESS)

{

// STEP 12: Attempt to initialize bridge

status = alt_bridge_init(bridge, NULL, NULL);

// status = alt_bridge_init(ALT_BRIDGE_F2H, NULL, NULL);

status = alt_bridge_init(ALT_BRIDGE_H2F, NULL, NULL);

// status = alt_bridge_init(ALT_BRIDGE_LWH2F, NULL, NULL);

}

I have a baremetal program working, preloader / spl, u boot and LW Bridge all is working 100%.

Thanks