Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorCyclone V SoC - Shared Memory Controller
Hi @all, I have a problem generating a Design with connection from FPGA to the HPS-Memorycontroller. I set up a QSYS-System with the connections and now try to get data from this Memory. ...
Altera_ForumHonored Contributor
Honored ContributorI am also interested in looking through an example project. I've been struggling with the FPGA-to-HPS SDRAM interface for a few weeks and haven't gotten anywhere.
WH2011, would you be able to post your example project publicly?
