Forum Discussion
Altera_Forum
Honored Contributor
13 years agoCyclone V SoC - Shared Memory Controller
Hi @all, I have a problem generating a Design with connection from FPGA to the HPS-Memorycontroller. I set up a QSYS-System with the connections and now try to get data from this Memory. ...
Altera_Forum
Honored Contributor
10 years agoCan either of you guys point me to a good example of this approach? Thanks -