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Altera_Forum
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12 years ago

Cyclone V SoC - Shared Memory Controller

Hi @all, I have a problem generating a Design with connection from FPGA to the HPS-Memorycontroller. I set up a QSYS-System with the connections and now try to get data from this Memory. ...
Altera_Forum's avatar
Altera_Forum
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11 years ago

Dear voroshazi!

I am student, I have just studied SocKit Cyclone V, my goal is to access FPGA SDRAM from HPS through HPS2FPGA AXI Bridge, I still don't know how to implement this project. Do you give me a device and related document.

I am looking forward your response.

Thank you so much!