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Since I'm more of a hardware person my approach to this would be to have a soft DMA sitting in the FPGA that accesses the FPGA-to-SDRAM interface to move the data. I'm not sure what your end goal will be but is it possible for the FPGA to master the data directory by accessing the FPGA-to-SDRAM interface without the copy?
Based on the numbers you are seeing it sounds like memcpy doesn't make use of the DMA in the HPS. Even if it did use the HPS DMA, I would expect much more bandwidth to be possible if the FPGA read the data directly from the FPGA-to-HPS interface though.
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Hi BadOmen,
I have tried to build a simple FPGA block that interrogates the SDRAM on the HPS via the F2H SDRAM port.
I'm using a module from an example on rocketboards (
http://www.rocketboards.org/foswiki/view/projects/myfirstmodule) that allocates a section of SDRAM on the HPS for the purposes of reading/writing via the FPGA. However on the FPGA side I cannot get a response to requests for memory reads, when viewed in signaltap, the waitrequest signal of the Avalon_MM bus is always high.
Do you know the reason for this and the solution? Is it possible that I need to do something in software to enable the F2H port on the HPS SDRAM.
Honored Contributor
